mirror of
https://gitdl.cn/https://github.com/chakralinux/core.git
synced 2025-02-11 13:34:36 +08:00
629 lines
22 KiB
Diff
629 lines
22 KiB
Diff
From 0db4b1708c2e5f3c14f48de186ee866ab8d9d5a9 Mon Sep 17 00:00:00 2001
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From: Alex Deucher <alexdeucher@gmail.com>
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Date: Wed, 07 Oct 2009 21:01:55 +0000
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Subject: radeon: clamp the internal FB map to the aperture size
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We don't use the invisible memory yet and on cards with
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large amounts of vram this can cause the top of GART
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calculation to overflow.
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Fixes bug fdo bug 24301:
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http://bugs.freedesktop.org/show_bug.cgi?id=24301
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---
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diff --git a/src/radeon_driver.c b/src/radeon_driver.c
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index 800397c..4e0dcf9 100644
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--- a/src/radeon_driver.c
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+++ b/src/radeon_driver.c
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@@ -1362,6 +1362,15 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
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if (aper_size > mem_size)
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mem_size = aper_size;
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+ /* don't map the whole FB in the internal address space.
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+ * we don't currently use fb space larger than the aperture
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+ * size and on cards with 1 GB of vram, this can overflow
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+ * the internal top of gart calculation on some systems.
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+ * See fdo bug 24301.
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+ */
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+ if (mem_size > aper_size)
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+ mem_size = aper_size;
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+
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#ifdef XF86DRI
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/* Apply memory map limitation if using an old DRI */
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if (info->directRenderingEnabled && !info->dri->newMemoryMap) {
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--
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cgit v0.8.3-6-g21f6
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From 26ecf3aad5f3a70b3267614bff6030604820f4d9 Mon Sep 17 00:00:00 2001
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From: Alex Deucher <alexdeucher@gmail.com>
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Date: Mon, 23 Nov 2009 17:54:41 +0000
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Subject: DCE3.2: fix uniphy2 dvi issues
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In some cases the atom transmitter table sets the
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golden value of this reg differently which some monitors
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don't like. I haven't had time to dig further, so this
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works around it for now.
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Fixes fdo bug 24313
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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---
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diff --git a/src/atombios_output.c b/src/atombios_output.c
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index 57345b3..66a86f4 100644
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--- a/src/atombios_output.c
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+++ b/src/atombios_output.c
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@@ -1472,6 +1472,18 @@ atombios_apply_output_quirks(xf86OutputPtr output, DisplayModePtr mode)
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/* set scaler clears this on some chips */
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if (IS_AVIVO_VARIANT && (mode->Flags & V_INTERLACE))
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OUTREG(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, AVIVO_D1MODE_INTERLEAVE_EN);
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+
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+ if (IS_DCE32_VARIANT && (radeon_output->active_device & (ATOM_DEVICE_DFP_SUPPORT))) {
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+ radeon_encoder_ptr radeon_encoder = radeon_get_encoder(output);
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+ if (radeon_encoder == NULL)
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+ return;
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+ /* XXX: need to sort out why transmitter control table sometimes sets this to a
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+ * different golden value.
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+ */
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+ if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY2) {
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+ OUTREG(0x7ec4, 0x00824002);
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+ }
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+ }
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}
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void
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--
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cgit v0.8.3-6-g21f6
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From 3d59746808bc5f335104d27a8dce0fe94ab3cb78 Mon Sep 17 00:00:00 2001
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From: Matthijs Kooijman <matthijs@stdin.nl>
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Date: Thu, 03 Dec 2009 17:10:14 +0000
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Subject: radeon: fix crtc2 dpms
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noticed by Matthijs Kooijman on fdo bug 22140
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---
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diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
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index 5ea13bc..aee3d15 100644
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--- a/src/legacy_crtc.c
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+++ b/src/legacy_crtc.c
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@@ -670,8 +670,7 @@ legacy_crtc_dpms(xf86CrtcPtr crtc, int mode)
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unsigned char *RADEONMMIO = pRADEONEnt->MMIO;
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if (radeon_crtc->crtc_id)
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- mask = (RADEON_CRTC2_EN |
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- RADEON_CRTC2_DISP_DIS |
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+ mask = (RADEON_CRTC2_DISP_DIS |
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RADEON_CRTC2_VSYNC_DIS |
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RADEON_CRTC2_HSYNC_DIS |
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RADEON_CRTC2_DISP_REQ_EN_B);
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@@ -683,7 +682,7 @@ legacy_crtc_dpms(xf86CrtcPtr crtc, int mode)
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switch(mode) {
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case DPMSModeOn:
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if (radeon_crtc->crtc_id) {
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- OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~mask);
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+ OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~(RADEON_CRTC2_EN | mask));
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} else {
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OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
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OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask);
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@@ -693,7 +692,7 @@ legacy_crtc_dpms(xf86CrtcPtr crtc, int mode)
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case DPMSModeSuspend:
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case DPMSModeOff:
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if (radeon_crtc->crtc_id) {
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- OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~mask);
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+ OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~(RADEON_CRTC2_EN | mask));
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} else {
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OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
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OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask);
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--
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cgit v0.8.3-6-g21f6
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From 45edca0e9d7b833b9de3037e94f293122c922e42 Mon Sep 17 00:00:00 2001
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From: Michel Dänzer <daenzer@vmware.com>
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Date: Thu, 03 Sep 2009 12:55:05 +0000
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Subject: EXA: Check for solid/gradient pictures the same way for all generations.
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In particular, also catch them for >= R300.
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---
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diff --git a/src/r600_exa.c b/src/r600_exa.c
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index 9aeb862..54d91e8 100644
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--- a/src/r600_exa.c
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+++ b/src/r600_exa.c
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@@ -1313,6 +1313,9 @@ static Bool R600CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP
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if (op >= (int) (sizeof(R600BlendOp) / sizeof(R600BlendOp[0])))
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RADEON_FALLBACK(("Unsupported Composite op 0x%x\n", op));
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+ if (!pSrcPicture->pDrawable)
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+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
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+
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pSrcPixmap = RADEONGetDrawablePixmap(pSrcPicture->pDrawable);
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max_tex_w = 8192;
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diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
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index 660ec43..e663b54 100644
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--- a/src/radeon_exa_render.c
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+++ b/src/radeon_exa_render.c
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@@ -478,7 +478,7 @@ static Bool R100CheckComposite(int op, PicturePtr pSrcPicture,
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RADEON_FALLBACK(("Unsupported Composite op 0x%x\n", op));
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if (!pSrcPicture->pDrawable)
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- return FALSE;
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+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
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/* r100 limit should be 2048, there are issues with 2048
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* see 197a62704742a4a19736c2637ac92d1dc5ab34ed
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@@ -813,7 +813,7 @@ static Bool R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP
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RADEON_FALLBACK(("Unsupported Composite op 0x%x\n", op));
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if (!pSrcPicture->pDrawable)
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- return FALSE;
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+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
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/* r200 limit should be 2048, there are issues with 2048
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* see bug 19269
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@@ -1192,6 +1192,9 @@ static Bool R300CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP
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if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
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RADEON_FALLBACK(("Unsupported Composite op 0x%x\n", op));
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+ if (!pSrcPicture->pDrawable)
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+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
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+
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pSrcPixmap = RADEONGetDrawablePixmap(pSrcPicture->pDrawable);
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if (IS_R500_3D) {
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--
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cgit v0.8.3-6-g21f6
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From 51266161f70baf4ddbf79ba6225ee2ae107a9f36 Mon Sep 17 00:00:00 2001
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From: Alex Deucher <alexdeucher@gmail.com>
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Date: Tue, 17 Nov 2009 19:16:22 +0000
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Subject: radeon: deal with connectors sourced to the same encoder
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Some systems have multiple connectors connected to the
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same encoder; e.g., DVI and HDMI connected to the same
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encoder with the same ddc line. Since we expose
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connectors as xrandr outputs, randr treats them separately
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which results in it trying to source the same encoder to
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different crtcs. If we have an HDMI and DVI-D port on the
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same encoder, pick the one to be considered connected
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based on the edid (HDMI if edid indicates HDMI, DVI
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otherwise). Also, don't turn off (dpms) encoders that are
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shared.
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Fixes fdo bug 21767.
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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---
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diff --git a/src/radeon_output.c b/src/radeon_output.c
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index edf59cd..6b6ba70 100644
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--- a/src/radeon_output.c
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+++ b/src/radeon_output.c
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@@ -236,10 +236,40 @@ radeon_ddc_connected(xf86OutputPtr output)
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case CONNECTOR_HDMI_TYPE_A:
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case CONNECTOR_HDMI_TYPE_B:
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if (radeon_output->shared_ddc) {
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+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn);
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+ int i;
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+
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if (MonInfo->rawData[0x14] & 0x80) /* if it's digital and DVI/HDMI/etc. */
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MonType = MT_DFP;
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else
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MonType = MT_NONE;
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+
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+ for (i = 0; i < config->num_output; i++) {
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+ if (output != config->output[i]) {
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+ RADEONOutputPrivatePtr other_radeon_output =
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+ config->output[i]->driver_private;
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+ if (radeon_output->devices & other_radeon_output->devices) {
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+#ifndef EDID_COMPLETE_RAWDATA
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+ if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) {
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+ MonType = MT_NONE;
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+ break;
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+ }
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+#else
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+ if (xf86MonitorIsHDMI(MonInfo)) {
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+ if (radeon_output->ConnectorType == CONNECTOR_DVI_D) {
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+ MonType = MT_NONE;
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+ break;
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+ }
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+ } else {
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+ if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) {
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+ MonType = MT_NONE;
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+ break;
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+ }
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+ }
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+#endif
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+ }
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+ }
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+ }
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} else
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MonType = MT_DFP;
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break;
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@@ -334,6 +364,22 @@ radeon_dpms(xf86OutputPtr output, int mode)
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if ((mode == DPMSModeOn) && radeon_output->enabled)
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return;
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+ if ((mode != DPMSModeOn) && radeon_output->shared_ddc) {
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+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn);
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+ int i;
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+
|
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+ for (i = 0; i < config->num_output; i++) {
|
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+ if (output != config->output[i]) {
|
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+ RADEONOutputPrivatePtr other_radeon_output =
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+ config->output[i]->driver_private;
|
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+ if (radeon_output->devices & other_radeon_output->devices) {
|
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+ if (output->status == XF86OutputStatusDisconnected)
|
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+ return;
|
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+ }
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+
|
|
if (IS_AVIVO_VARIANT || info->r4xx_atom) {
|
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atombios_output_dpms(output, mode);
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} else {
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--
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cgit v0.8.3-6-g21f6
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From 587f693886e9025ba6fc30a8405902c43b2fcfb2 Mon Sep 17 00:00:00 2001
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From: Alex Deucher <alexdeucher@gmail.com>
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Date: Tue, 22 Dec 2009 13:45:27 +0000
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|
Subject: radeon: add cvt timing if we only have panel w/h
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|
|
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fixes mac laptops without an edid
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|
|
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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---
|
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diff --git a/src/radeon_modes.c b/src/radeon_modes.c
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index ec60cc9..ce55c9f 100644
|
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--- a/src/radeon_modes.c
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+++ b/src/radeon_modes.c
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@@ -169,6 +169,20 @@ static DisplayModePtr RADEONFPNativeMode(xf86OutputPtr output)
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Added native panel mode: %dx%d\n",
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native_mode->PanelXRes, native_mode->PanelYRes);
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+ } else if (native_mode->PanelXRes != 0 &&
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+ native_mode->PanelYRes != 0) {
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+
|
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+ new = xf86CVTMode(native_mode->PanelXRes, native_mode->PanelYRes, 60.0, TRUE, FALSE);
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+
|
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+ if (new) {
|
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+ new->type = M_T_DRIVER | M_T_PREFERRED;
|
|
+
|
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+ new->next = NULL;
|
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+ new->prev = NULL;
|
|
+ }
|
|
+
|
|
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Added native panel mode using CVT: %dx%d\n",
|
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+ native_mode->PanelXRes, native_mode->PanelYRes);
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}
|
|
|
|
return new;
|
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--
|
|
cgit v0.8.3-6-g21f6
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From 6dc632e2e91b6a7159ab3a27617b031713d8b8c4 Mon Sep 17 00:00:00 2001
|
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From: Alex Deucher <alexdeucher@gmail.com>
|
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Date: Mon, 09 Nov 2009 20:09:34 +0000
|
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Subject: IGP: some IGP chips report as AGP
|
|
|
|
Set bus type appropriately. fixes bug 25002
|
|
|
|
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
---
|
|
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
|
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index c726f8f..17253a7 100644
|
|
--- a/src/radeon_driver.c
|
|
+++ b/src/radeon_driver.c
|
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@@ -1959,6 +1959,11 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
|
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if (info->cardType == CARD_PCIE && info->IsIGP)
|
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info->cardType = CARD_PCI;
|
|
|
|
+ /* some rs4xx cards report as agp */
|
|
+ if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
|
|
+ (info->ChipFamily == CHIP_FAMILY_RS480))
|
|
+ info->cardType = CARD_PCI;
|
|
+
|
|
if ((info->ChipFamily >= CHIP_FAMILY_R600) && info->IsIGP)
|
|
info->cardType = CARD_PCIE;
|
|
|
|
@@ -1972,7 +1977,13 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
|
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xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into AGP mode\n");
|
|
} else if ((strcmp(s, "PCI") == 0) ||
|
|
(strcmp(s, "PCIE") == 0)) {
|
|
- if (info->ChipFamily >= CHIP_FAMILY_RV380) {
|
|
+ if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
|
|
+ (info->ChipFamily == CHIP_FAMILY_RS480) ||
|
|
+ (info->ChipFamily == CHIP_FAMILY_RS690) ||
|
|
+ (info->ChipFamily == CHIP_FAMILY_RS740)) {
|
|
+ info->cardType = CARD_PCI;
|
|
+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into PCI mode\n");
|
|
+ } else if (info->ChipFamily >= CHIP_FAMILY_RV380) {
|
|
info->cardType = CARD_PCIE;
|
|
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into PCI Express mode\n");
|
|
} else {
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From 93de38348fa77987297c3977d5acddbae54fbc10 Mon Sep 17 00:00:00 2001
|
|
From: Alex Deucher <alexdeucher@gmail.com>
|
|
Date: Thu, 12 Nov 2009 16:11:17 +0000
|
|
Subject: radeon: man page updates
|
|
|
|
---
|
|
diff --git a/man/radeon.man b/man/radeon.man
|
|
index 09239cf..4d8942f 100644
|
|
--- a/man/radeon.man
|
|
+++ b/man/radeon.man
|
|
@@ -40,14 +40,14 @@ R/RV/RS2xx and RS3xx);
|
|
.TP
|
|
\(bu
|
|
Textured XVideo acceleration including anti-tearing support (Bicubic filtering
|
|
-only available on R/RV3xx, R/RV/RS4xx, R/RV5xx, and RS6xx);
|
|
+only available on R/RV3xx, R/RV/RS4xx, R/RV5xx, and RS6xx/RS740);
|
|
.TP
|
|
\(bu
|
|
Overlay XVideo acceleration (only on R/RV/RS1xx, R/RV/RS2xx,
|
|
R/RV/RS3xx, R/RV/RS4xx);
|
|
.TP
|
|
\(bu
|
|
-3D acceleration (not supported on R/RV6xx and R/RV/RS7xx);
|
|
+3D acceleration;
|
|
.PD
|
|
.SH SUPPORTED HARDWARE
|
|
The
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From c2892cbd18e0f25401b615055425f727e096b7cd Mon Sep 17 00:00:00 2001
|
|
From: Alex Deucher <alexdeucher@gmail.com>
|
|
Date: Tue, 17 Nov 2009 16:45:09 +0000
|
|
Subject: radeon: fix potential memory leak in ddc code
|
|
|
|
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
---
|
|
diff --git a/src/radeon_output.c b/src/radeon_output.c
|
|
index acba31f..edf59cd 100644
|
|
--- a/src/radeon_output.c
|
|
+++ b/src/radeon_output.c
|
|
@@ -268,9 +268,11 @@ radeon_ddc_connected(xf86OutputPtr output)
|
|
break;
|
|
}
|
|
|
|
- if (MonType != MT_NONE)
|
|
+ if (MonType != MT_NONE) {
|
|
if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE))
|
|
xf86OutputSetEDID(output, MonInfo);
|
|
+ } else
|
|
+ xfree(MonInfo);
|
|
} else
|
|
MonType = MT_NONE;
|
|
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From ca9c619c9c085fac3bea486cfce1c8b5ba09cd52 Mon Sep 17 00:00:00 2001
|
|
From: Alex Deucher <alexdeucher@gmail.com>
|
|
Date: Fri, 30 Oct 2009 21:36:29 +0000
|
|
Subject: radeon: clamp the internal FB map to the aperture size v2
|
|
|
|
We don't use the invisible memory yet and on cards with
|
|
large amounts of vram this can cause the top of GART
|
|
calculation to overflow.
|
|
|
|
Fixes bug fdo bug 24301:
|
|
http://bugs.freedesktop.org/show_bug.cgi?id=24301
|
|
|
|
v2: only clamp cards with more than 512 MB. This seems
|
|
to cause problems on some older cards due to the way the
|
|
drm and ddx set up the internal memory map.
|
|
---
|
|
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
|
|
index 4e0dcf9..c726f8f 100644
|
|
--- a/src/radeon_driver.c
|
|
+++ b/src/radeon_driver.c
|
|
@@ -1364,11 +1364,14 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
|
|
|
|
/* don't map the whole FB in the internal address space.
|
|
* we don't currently use fb space larger than the aperture
|
|
- * size and on cards with 1 GB of vram, this can overflow
|
|
+ * size and on cards with more than 512 MB of vram, this can overflow
|
|
* the internal top of gart calculation on some systems.
|
|
+ * Limit it to cards with more than 512 MB as this causes problems
|
|
+ * on some other cards due to the way the ddx and drm set up the
|
|
+ * internal memory map.
|
|
* See fdo bug 24301.
|
|
*/
|
|
- if (mem_size > aper_size)
|
|
+ if (mem_size > 0x20000000)
|
|
mem_size = aper_size;
|
|
|
|
#ifdef XF86DRI
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From d1d3681748251fb7e95b8d56e6c37847ca6b1a8d Mon Sep 17 00:00:00 2001
|
|
From: Michael Olbrich <m.olbrich@pengutronix.de>
|
|
Date: Sun, 20 Sep 2009 12:19:41 +0000
|
|
Subject: use AC_CHECK_HEADER instead of AC_CHECK_FILE
|
|
|
|
AC_CHECK_FILE is not possible when cross-compiling. Use AC_CHECK_HEADER /
|
|
AC_PREPROC_IFELSE instead.
|
|
|
|
[ Michel Dänzer: Shuffled things around slightly to make it work on my setup ]
|
|
|
|
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
|
|
Signed-off-by: Michel Dänzer <daenzer@vmware.com>
|
|
(cherry picked from commit 97a4e747bfac14f34646c55ddf639e8fe22f2f55)
|
|
---
|
|
diff --git a/configure.ac b/configure.ac
|
|
index f081c67..a19a308 100644
|
|
--- a/configure.ac
|
|
+++ b/configure.ac
|
|
@@ -88,14 +88,21 @@ sdkdir=$(pkg-config --variable=sdkdir xorg-server)
|
|
AC_HEADER_STDC
|
|
|
|
if test "$DRI" != no; then
|
|
- AC_CHECK_FILE([${sdkdir}/dri.h],
|
|
- [have_dri_h="yes"], [have_dri_h="no"])
|
|
- AC_CHECK_FILE([${sdkdir}/sarea.h],
|
|
- [have_sarea_h="yes"], [have_sarea_h="no"])
|
|
- AC_CHECK_FILE([${sdkdir}/dristruct.h],
|
|
- [have_dristruct_h="yes"], [have_dristruct_h="no"])
|
|
- AC_CHECK_FILE([${sdkdir}/damage.h],
|
|
- [have_damage_h="yes"], [have_damage_h="no"])
|
|
+ PKG_CHECK_MODULES(DRI, [libdrm >= 2.2 xf86driproto])
|
|
+ save_CPPFLAGS="$CPPFLAGS"
|
|
+ CPPFLAGS="$XORG_CFLAGS $DRI_CFLAGS"
|
|
+ AC_CHECK_HEADER([dri.h],
|
|
+ [have_dri_h="yes"], [have_dri_h="no"],[-])
|
|
+ AC_CHECK_HEADER([sarea.h],
|
|
+ [have_sarea_h="yes"], [have_sarea_h="no"],[-])
|
|
+ AC_PREPROC_IFELSE([AC_LANG_PROGRAM([[
|
|
+#include <xorg-server.h>
|
|
+#include <dristruct.h>
|
|
+ ]])],
|
|
+ [have_dristruct_h="yes"], [have_dristruct_h="no"],[-])
|
|
+ AC_CHECK_HEADER([damage.h],
|
|
+ [have_damage_h="yes"], [have_damage_h="no"],[-])
|
|
+ CPPFLAGS="$save_CPPFLAGS"
|
|
fi
|
|
|
|
AC_MSG_CHECKING([whether to include DRI support])
|
|
@@ -112,7 +119,6 @@ AC_MSG_RESULT([$DRI])
|
|
|
|
AM_CONDITIONAL(DRI, test x$DRI = xyes)
|
|
if test "$DRI" = yes; then
|
|
- PKG_CHECK_MODULES(DRI, [libdrm >= 2.2 xf86driproto])
|
|
AC_DEFINE(XF86DRI,1,[Enable DRI driver support])
|
|
AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support])
|
|
if test "$have_damage_h" = yes; then
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From e7b26abc3c20fb53bf2cd02404ac5e0654fee18d Mon Sep 17 00:00:00 2001
|
|
From: Matthias Hopf <mhopf@suse.de>
|
|
Date: Tue, 15 Dec 2009 15:53:48 +0000
|
|
Subject: fix 200M freezes on VT switch if CRTC is disabled
|
|
|
|
It appears that RS4xx chips need to have the crtc
|
|
enabled when the timing is programmed.
|
|
|
|
agd5f: minor fixes/cleanup of the original patch
|
|
---
|
|
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
|
|
index aee3d15..ba3b102 100644
|
|
--- a/src/legacy_crtc.c
|
|
+++ b/src/legacy_crtc.c
|
|
@@ -912,6 +912,11 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save,
|
|
? RADEON_CRTC_INTERLACE_EN
|
|
: 0));
|
|
|
|
+ /* 200M freezes on VT switch sometimes if CRTC is disabled */
|
|
+ if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
|
|
+ (info->ChipFamily == CHIP_FAMILY_RS480))
|
|
+ save->crtc_gen_cntl |= RADEON_CRTC_EN;
|
|
+
|
|
save->crtc_ext_cntl |= (RADEON_XCRT_CNT_EN|
|
|
RADEON_CRTC_VSYNC_DIS |
|
|
RADEON_CRTC_HSYNC_DIS |
|
|
@@ -1162,6 +1167,11 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save,
|
|
? RADEON_CRTC2_INTERLACE_EN
|
|
: 0));
|
|
|
|
+ /* 200M freezes on VT switch sometimes if CRTC is disabled */
|
|
+ if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
|
|
+ (info->ChipFamily == CHIP_FAMILY_RS480))
|
|
+ save->crtc2_gen_cntl |= RADEON_CRTC2_EN;
|
|
+
|
|
save->disp2_merge_cntl = info->SavedReg->disp2_merge_cntl;
|
|
save->disp2_merge_cntl &= ~(RADEON_DISP2_RGB_OFFSET_EN);
|
|
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From eab41805c0e6cc6deb7eca9342457b690834d7d2 Mon Sep 17 00:00:00 2001
|
|
From: Alex Deucher <alexdeucher@gmail.com>
|
|
Date: Thu, 05 Nov 2009 15:23:03 +0000
|
|
Subject: EXA: fallback if no pMaskPicture->pDrawable
|
|
|
|
A solid or gradient mask could be used for blending
|
|
the source picture onto the destination picture.
|
|
|
|
Fixes fdo bug 24838
|
|
|
|
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
---
|
|
diff --git a/src/r600_exa.c b/src/r600_exa.c
|
|
index bee8f09..9aeb862 100644
|
|
--- a/src/r600_exa.c
|
|
+++ b/src/r600_exa.c
|
|
@@ -1337,7 +1337,12 @@ static Bool R600CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP
|
|
}
|
|
|
|
if (pMaskPicture) {
|
|
- PixmapPtr pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
+ PixmapPtr pMaskPixmap;
|
|
+
|
|
+ if (!pMaskPicture->pDrawable)
|
|
+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
|
|
+
|
|
+ pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
|
|
if (pMaskPixmap->drawable.width >= max_tex_w ||
|
|
pMaskPixmap->drawable.height >= max_tex_h) {
|
|
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
|
|
index 8e98b9f..660ec43 100644
|
|
--- a/src/radeon_exa_render.c
|
|
+++ b/src/radeon_exa_render.c
|
|
@@ -503,7 +503,12 @@ static Bool R100CheckComposite(int op, PicturePtr pSrcPicture,
|
|
}
|
|
|
|
if (pMaskPicture) {
|
|
- PixmapPtr pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
+ PixmapPtr pMaskPixmap;
|
|
+
|
|
+ if (!pMaskPicture->pDrawable)
|
|
+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
|
|
+
|
|
+ pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
|
|
if (pMaskPixmap->drawable.width > 2047 ||
|
|
pMaskPixmap->drawable.height > 2047) {
|
|
@@ -833,7 +838,12 @@ static Bool R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP
|
|
}
|
|
|
|
if (pMaskPicture) {
|
|
- PixmapPtr pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
+ PixmapPtr pMaskPixmap;
|
|
+
|
|
+ if (!pMaskPicture->pDrawable)
|
|
+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
|
|
+
|
|
+ pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
|
|
if (pMaskPixmap->drawable.width > 2047 ||
|
|
pMaskPixmap->drawable.height > 2047) {
|
|
@@ -1213,7 +1223,12 @@ static Bool R300CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP
|
|
}
|
|
|
|
if (pMaskPicture) {
|
|
- PixmapPtr pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
+ PixmapPtr pMaskPixmap;
|
|
+
|
|
+ if (!pMaskPicture->pDrawable)
|
|
+ RADEON_FALLBACK(("Solid or gradient pictures not supported yet\n"));
|
|
+
|
|
+ pMaskPixmap = RADEONGetDrawablePixmap(pMaskPicture->pDrawable);
|
|
|
|
if (pMaskPixmap->drawable.width > max_tex_w ||
|
|
pMaskPixmap->drawable.height > max_tex_h) {
|
|
--
|
|
cgit v0.8.3-6-g21f6
|
|
From ecc192e2e5d72090bb35b142c6dc4639ec2542f0 Mon Sep 17 00:00:00 2001
|
|
From: Dave Airlie <airlied@linux.ie>
|
|
Date: Fri, 25 Sep 2009 20:03:51 +0000
|
|
Subject: radeon: fix zaphod
|
|
|
|
---
|
|
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
|
|
index 551cb7f..800397c 100644
|
|
--- a/src/radeon_driver.c
|
|
+++ b/src/radeon_driver.c
|
|
@@ -3727,6 +3727,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
|
|
memset(info->FB + pScrn->fbOffset, 0,
|
|
pScrn->virtualY * pScrn->displayWidth * info->CurrentLayout.pixel_bytes);
|
|
|
|
+ pScrn->pScreen = pScreen;
|
|
+
|
|
/* set the modes with desired rotation, etc. */
|
|
if (!xf86SetDesiredModes (pScrn))
|
|
return FALSE;
|
|
--
|
|
cgit v0.8.3-6-g21f6
|